A full-transistor fine-grain multilevel delay element with compact regularity layout - 河科大电子系 IC课题组 | LabXing

array(2) { ["lab"]=> string(4) "1537" ["publication"]=> string(5) "14282" } A full-transistor fine-grain multilevel delay element with compact regularity layout - 河科大电子系 IC课题组 | LabXing

河科大电子系 IC课题组

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A full-transistor fine-grain multilevel delay element with compact regularity layout

2020

期刊 Analog Integrated Circuits and Signal Processing

作者 Bo Liu · Zhi-Hui Huang · Jin-Can Zhang · Min Liu · Qing-Duan Meng

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卷 103
期 1
页码 163-172
Springer Science and Business Media LLC
ISSN: 0925-1030
DOI: 10.1007/s10470-020-01588-y

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